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The gpgpu fill utility functions are used in separate test so it's
logical to keep them in separate file. This is similar to what media
spin test did in the past.
Functionally only gpgpu kernel changed. Send instruction payload size
was reduced. Since offset is incremented by 0x10 bytes there is no point
in using larger writes.
Cc: Thomas Wood <thomas.wood@intel.com>
Signed-off-by: Dominik Zeromski <dominik.zeromski@intel.com>
[Thomas: Fix typo of gpgpu_fill.h in Makefile.sources]
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
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This is to add fill operation using GPGPU pipeline which is similar to
current media fill. This can be used to simply verify GPGPU pipeline
and help to enable it on newer HW, currently it works on Gen7 only and
will add support on later platform.
Now this sets very simply thread group dispatch for one thread per
thread group on SIMD16 dispatch. So the fill shader just uses thread
group ID for buffer offset.
v2: No new fill func typedef but adapt to igt_fillfunc_t.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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The code is for reference only
v2: Fixed the source register used for the send with EOT
Fixed the posted destination operand for the send with EOT
v3: Fixed the cache agent used in media_block_write message on GEN8
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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For posterity, I've squashed these commits against Damien's request.
rendercopy/gen8: Fix the include guards
rendercopy/gen8: Update the 3DSTATE_MULTISAMPLE opcode
The opcode has changed in BDW.
rendercopy/gen8: Add the VF_TOPOLOGY state
The primitive type has moved out of the 3DPRIMITIVE to its own state,
VF_TOPOLOGY.
rendercopy/gen8: Fixup 3STATE_PS
Update the state to the latest BSpec, in particular the thread count was
using a wrong shift and we were missing kernel2 offset.
rendercopy/gen8: Update 3DSTATE_BASE_ADDRESS
This state has seen its fields moved around a bit, follow the BSpec.
rendercopy/gen8: Allocate 64 VUEs
The simulator screams at us if we try to allocate less than that.
rendercopy/gen8: Surface states have to be 64 bytes a aligned
rendercopy/gen8: Vertical/horizontal align 2 does not exist any more
So set them to 4. This should not matter with rendercopy (which is not
using compressed textures), but it makes the simulator moan.
rendercopy/gen8: Make sure the vertex buffer is 8 bytes aligned
rendercopy/gen8: Adjust 3DSTATE_VERTEX_BUFFERS for gen8
The address of the buffer is now on 48 bits. Also the size was computed
as offset + size where the field is really the size of the buffer
itself, not the end address.
rendercopy/gen8: Update the SF/SBE states for gen8
gen8 has a few changes around those states and a new ones RASTER and
SBE_SWIZ.
rendercopy/gen8: Add the PS_EXTRA and PS_BLEND states
rendercopy/gen8: Fix building with DEBUG_RENDERCOPY defined
The forward declaration was missing the final ';'. Let's move the whole
function at the top instead.
rendercopy/gen8: Update the PS and CONSTANT_PS states
rendercopy/gen8: Fix the red channel selection
Make it output red.
rendercopy/gen8: Update the write -1 shader
With the latest assembler changes from Haihao.
rendercopy/gen8: Remove blit.g8a
There is no diff between this file and blig.g7a. Remove it.
rendercopy/gen8: Fix the surface relocation offset
The surface base address is now at dwords 8/9 so the relocation has to
mirror the change.
rendercopy/gen8: Add the VF_INSTANCING state
Should work without, but doesn't hurt to add it.
rendercopy/gen8: Set the Attribule enable field in PS_EXTRA
When the SF is set up to output some attributes, the pixel shader also
have to be told there's attributes to care about.
rendercopy/gen8: Set the force bits to read URB offset/length
If we want to override the URB offset/length in the SBE state itself, we
need to set the force bits on (new in gen8)
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
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Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
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Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
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