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path: root/tests/i915/gem_mmap_gtt.c
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2019-04-18lib/igt_dummyload: Get rid of 'batch' on spinner accessorsMika Kuoppala
There is no guarantee that spinners are and will be implemented using batches. As we have igt_spin_t, manipulate it through igt_spin_* functions consistently and hide the batch nature. Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2019-04-16i915/gem_mmap_gtt: Markup a couple of GTT set-domainsChris Wilson
We have to control the cache domains, especially important before first writing into the object. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2019-03-29Revert "lib/igt_device: Move intel_get_pci_device under igt_device"Ville Syrjälä
One significant usecase for intel_reg/etc. is to be able to examine the hardware state *before* loading the driver. If the tool forces the driver to load we've totally lost that capability. This reverts commit 8ae86621d6fff60b6e20c6b0f9b336785c935b0f. Cc: Michał Winiarski <michal.winiarski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Acked-by: Michał Winiarski <michal.winiarski@intel.com>
2019-03-25i915: Mark up some forgotten set-domainChris Wilson
It is the user's responsibility to manage their domains. In libdrm, when you mmap a pointer, it calls set-domain automatically, but igt requires the caller to manage it explicitly, so do so. The vast majority already do correct manage the domain as they use the pointer into the mmap, just a few have been missed over the years. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2019-03-21i915/gem_mmap_gtt: Check that the initial pagefault is non-blockingChris Wilson
Historically, the GTT pagefault invoked set-domain(GTT) to transparently handle swapin. However, this implied that the GTT faults were synchronous with GPU rendering, which was not the desired ABI, as synchronisation is explicit via calls to GEM_WAIT or GEM_SET_DOMAIN. In MMAP_GTT_VERSION, this accidental ABI is removed and so we test it is gone and does not come back. For completeness, we verify that the other mmap paths didn't block on initial pagefaulting. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Matthew Auld <matthew.auld@intel.com>
2019-03-20lib/igt_device: Move intel_get_pci_device under igt_deviceMichał Winiarski
It allows us to make things a little bit more generic. Also, we now require fd rather than doing guesswork when it comes to pci address. v2: Use readlinkat rather than string concat, move stuff around, provide a version that does not assert. (Chris) v3: Print addr on failure, avoid assignment in conditionals. (Chris) Signed-off-by: Michał Winiarski <michal.winiarski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2019-03-19tests/i915/gem_mmap_gtt: Add invalid parameters testAntonio Argenziano
Add a test for an invalid handle being passed to the IOCTL. v2: - Expand test space. (Chris) Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2019-02-12i915/gem_mmap_gtt: Impose a timeout for "hang"Chris Wilson
Only wait a maximum of 2 more seconds for the hang children to complete, to catch deadlocks in a timely fashion. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
2019-01-24i915/gem_mmap_gtt: Reset faster and longer to catch fencing errorsChris Wilson
Performing a GPU reset clobbers the fence registers, affecting which addresses the tiled GTT mmap access. If the driver does not take precautions across a GPU reset, a client may read the wrong values (but only within their own buffer as the fence will only be degraded to I915_TILING_NONE, reducing the access area). However, as this requires performing a read using the indirect GTT at exactly the same time as the reset occurs, it can be quite difficult to catch, so repeat the test many times and across all cores simultaneously. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
2018-10-23tests: Introduce i915 directoryArkadiusz Hiler
We can already move all the tests with distinct prefixes: gem_, gen3_ and i915_. pm_ and drv_ tests will follow in batches, so we can do the adjustments in the reporting/filtering layer of the CI system. v2: Fix test-list.txt generation with meson v3: Fix docs build (Petri) Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Petri Latvala <petri.latvala@intel.com> Cc: Martin Peres <martin.peres@linux.intel.com> Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com> Reviewed-by: Petri Latvala <petri.latvala@intel.com> Tested-by: Petri Latvala <petri.latvala@intel.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Chris Wilson <chris@chris-wilson.co.uk>