diff options
| author | Icenowy Zheng <icenowy@aosc.io> | 2018-05-04 02:38:45 +0800 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2018-05-04 17:09:41 +0200 |
| commit | 1ecefb83ec6415ced08e6d8b9cefa768f3a411a0 (patch) | |
| tree | e537063bbfacbebfb68f3afa686dd7e4622562dd | |
| parent | 71f9bdbd4d291b3883fbda7ebeb6efae68e55f32 (diff) | |
arm64: allwinner: h6: add R_INTC interrupt controller
Allwinner H6 SoC has also a R_INTC interrupt controller like Allwinner
A64 SoC, but has its base address changed due to the memory map change
in H6.
Add it into the device tree.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| -rw-r--r-- | arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi index a1d19f923fdf..2334ba05b12e 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi @@ -184,6 +184,15 @@ #reset-cells = <1>; }; + r_intc: interrupt-controller@7021000 { + compatible = "allwinner,sun50i-h6-r-intc", + "allwinner,sun6i-a31-r-intc"; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x07021000 0x400>; + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; + }; + r_pio: pinctrl@7022000 { compatible = "allwinner,sun50i-h6-r-pinctrl"; reg = <0x07022000 0x400>; |