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authorGwan-gyeong Mun <gwan-gyeong.mun@intel.com>2021-04-01 20:02:37 +0300
committerJosé Roberto de Souza <jose.souza@intel.com>2021-04-02 10:24:43 -0700
commit2d667442dbe70e7e78c3450b17ba5aa5032a7b6b (patch)
tree48dd187db1281dd568a4b6c57840b8ebb5ada599
parentd339ef1c4d6bb351251211d296ecbe05c2a54819 (diff)
drm/i915/display/psr: Disable DC3CO when the PSR2 is used
Due to the changed sequence of activating/deactivating DC3CO, disable DC3CO until the changed dc3co activating/deactivating sequence is applied. References: https://gitlab.freedesktop.org/drm/intel/-/issues/3134 Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210401170237.40472-1-gwan-gyeong.mun@intel.com
-rw-r--r--drivers/gpu/drm/i915/display/intel_psr.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 1d561812fcad..32d3d56259c2 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -655,6 +655,13 @@ tgl_dc3co_exitline_compute_config(struct intel_dp *intel_dp,
u32 exit_scanlines;
/*
+ * FIXME: Due to the changed sequence of activating/deactivating DC3CO,
+ * disable DC3CO until the changed dc3co activating/deactivating sequence
+ * is applied. B.Specs:49196
+ */
+ return;
+
+ /*
* DMC's DC3CO exit mechanism has an issue with Selective Fecth
* TODO: when the issue is addressed, this restriction should be removed.
*/