diff options
| author | Alexander Monakov <amonakov@ispras.ru> | 2018-03-18 20:11:49 +0300 |
|---|---|---|
| committer | Jisheng Zhang <Jisheng.Zhang@synaptics.com> | 2018-05-24 14:48:50 +0800 |
| commit | 2e554390ab8470e9f8bccfd602395c3b4c19c37e (patch) | |
| tree | 6bf7845d0036c134e8fa5cd74b3fc817dbf20c98 | |
| parent | 60cc43fc888428bb2f18f08997432d426a243338 (diff) | |
ARM: berlin: extend BG2CD Kconfig entry
BG2CD SoC uses r3p0 Cortex-A9 MPCore single-CPU cluster. Autoselect
pertinent errata, the SCU and the global timer, and allow use of the
local timer on uniprocessor kernels.
PL310 L2 cache controller has revision r3p2; no errata to select.
Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
| -rw-r--r-- | arch/arm/mach-berlin/Kconfig | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/mach-berlin/Kconfig b/arch/arm/mach-berlin/Kconfig index 63ab1d368625..3d719cf645e3 100644 --- a/arch/arm/mach-berlin/Kconfig +++ b/arch/arm/mach-berlin/Kconfig @@ -23,8 +23,12 @@ config MACH_BERLIN_BG2 config MACH_BERLIN_BG2CD bool "Marvell Armada 1500-mini (BG2CD)" + select ARM_ERRATA_754322 + select ARM_ERRATA_775420 + select ARM_GLOBAL_TIMER select CACHE_L2X0 - select HAVE_ARM_TWD if SMP + select HAVE_ARM_SCU + select HAVE_ARM_TWD select PINCTRL_BERLIN_BG2CD config MACH_BERLIN_BG2Q |