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authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>2020-11-05 12:11:27 +0000
committerGeert Uytterhoeven <geert+renesas@glider.be>2020-11-10 09:29:47 +0100
commit43bba65761952f58e850d918ee43b648427609bb (patch)
tree67331c525fc3d4a25f32c00df41dff7f974dea61
parentdd8ecc02743cc337ab56014448bacaa763c33074 (diff)
arm64: dts: renesas: hihope-rev4: Add a comment explaining switch SW2404
Switch SW2404 should be at position 1 so that the clock output from CS2000 is connected to AUDIO_CLKB_A. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com> Link: https://lore.kernel.org/r/20201105121127.11830-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-rw-r--r--arch/arm64/boot/dts/renesas/hihope-rev4.dtsi6
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/renesas/hihope-rev4.dtsi b/arch/arm64/boot/dts/renesas/hihope-rev4.dtsi
index 3046c07a288b..929f4a1d3f90 100644
--- a/arch/arm64/boot/dts/renesas/hihope-rev4.dtsi
+++ b/arch/arm64/boot/dts/renesas/hihope-rev4.dtsi
@@ -91,7 +91,11 @@
#clock-cells = <1>;
clock-frequency = <12288000 11289600>;
- /* update <audio_clk_b> to <cs2000> */
+ /*
+ * Update <audio_clk_b> to <cs2000>
+ * Switch SW2404 should be at position 1 so that clock from
+ * CS2000 is connected to AUDIO_CLKB_A
+ */
clocks = <&cpg CPG_MOD 1005>,
<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,