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authorThierry Reding <treding@nvidia.com>2021-03-26 15:51:36 +0100
committerThierry Reding <treding@nvidia.com>2021-03-31 17:42:14 +0200
commit476e93205ff61a6507bcba28f4f01269b65ebb38 (patch)
treea3b4cae2dd3678b586e7fde0e051ae92893a30c1
parent4def888d4158ee8977995664bb55fa50894645d2 (diff)
drm/tegra: gem: Add a clarifying comment
Clarify when a fixed IOV address can be used and when a buffer has to be mapped before the IOVA can be used. Signed-off-by: Thierry Reding <treding@nvidia.com>
-rw-r--r--drivers/gpu/drm/tegra/plane.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/tegra/plane.c b/drivers/gpu/drm/tegra/plane.c
index 19e8847a164b..793da5d675d2 100644
--- a/drivers/gpu/drm/tegra/plane.c
+++ b/drivers/gpu/drm/tegra/plane.c
@@ -119,6 +119,14 @@ static int tegra_dc_pin(struct tegra_dc *dc, struct tegra_plane_state *state)
dma_addr_t phys_addr, *phys;
struct sg_table *sgt;
+ /*
+ * If we're not attached to a domain, we already stored the
+ * physical address when the buffer was allocated. If we're
+ * part of a group that's shared between all display
+ * controllers, we've also already mapped the framebuffer
+ * through the SMMU. In both cases we can short-circuit the
+ * code below and retrieve the stored IOV address.
+ */
if (!domain || dc->client.group)
phys = &phys_addr;
else