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| author | Alex Deucher <alexander.deucher@amd.com> | 2017-03-27 14:40:36 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2017-03-29 23:55:46 -0400 |
| commit | 480e9150ea329fc774f943a56c8de9cc361efef1 (patch) | |
| tree | 144ccaa4cc4c7b57930e10bf19114d5f4e626f7a | |
| parent | c013cea2df9c06aca7e218d8d41693ba2d17455d (diff) | |
drm/amdgpu/soc15: drop support for reading some registers
The RB harvest registers are not necessary, the driver already
exposes this info via the info ioctl. GB_BACKEND_MAP has
been deprecated since SI and is not relevant to the RB mapping.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/soc15.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c index c839994d82d0..238fcc3fa78d 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc15.c +++ b/drivers/gpu/drm/amd/amdgpu/soc15.c @@ -300,9 +300,6 @@ static struct amdgpu_allowed_register_entry soc15_allowed_read_registers[] = { { SOC15_REG_OFFSET(GC, 0, mmCP_CPC_STALLED_STAT1), false}, { SOC15_REG_OFFSET(GC, 0, mmCP_CPC_STATUS), false}, { SOC15_REG_OFFSET(GC, 0, mmGB_ADDR_CONFIG), false}, - { SOC15_REG_OFFSET(GC, 0, mmCC_RB_BACKEND_DISABLE), false, true}, - { SOC15_REG_OFFSET(GC, 0, mmGC_USER_RB_BACKEND_DISABLE), false, true}, - { SOC15_REG_OFFSET(GC, 0, mmGB_BACKEND_MAP), false, false}, }; static uint32_t soc15_read_indexed_register(struct amdgpu_device *adev, u32 se_num, |