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authorThor Thayer <thor.thayer@linux.intel.com>2018-04-05 14:12:49 -0500
committerBoris Brezillon <boris.brezillon@bootlin.com>2018-04-20 22:51:19 +0200
commit56c6855c81c8a6828b5d65aa974cd50f4b67760c (patch)
tree2f6ae3fb370b98fc07f73f20c2c356fe44171021
parent60cc43fc888428bb2f18f08997432d426a243338 (diff)
mtd: spi-nor: Add Micron MT25QU02 support
Add support for a new Micron 2Gb Flash memory part. Datasheet is available: mt25q_qlkt_l_02g_cbb_0.pdf Testing was done on a Stratix10 SoCFPGA Development Kit. Reported-by: Sujith Chidurala <sujith.chakra.chidurala@intel.com> Tested-by: Paul Kim <paul.kim@intel.com> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com> Acked-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
-rw-r--r--drivers/mtd/spi-nor/spi-nor.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 5bfa36e95f35..8b459766a4ca 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -1087,6 +1087,7 @@ static const struct flash_info spi_nor_ids[] = {
{ "n25q512ax3", INFO(0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
{ "n25q00", INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
{ "n25q00a", INFO(0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
+ { "mt25qu02g", INFO(0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
/* PMC */
{ "pm25lv512", INFO(0, 0, 32 * 1024, 2, SECT_4K_PMC) },