diff options
author | Nishanth Menon <nm@ti.com> | 2021-09-16 13:18:01 -0500 |
---|---|---|
committer | Nishanth Menon <nm@ti.com> | 2021-09-20 13:51:10 -0500 |
commit | 6037c75b193ac7aec33f131cd48744549b552604 (patch) | |
tree | af7e6c03933706bf0e8c24df0b6499a6bff92194 | |
parent | f54e1a97c8dbfe7717e15690c79f1bf20186e1fe (diff) |
arm64: dts: ti: k3-am65: Relocate thermal-zones to SoC specific location
When commit 64f9147d914d ("arm64: dts: ti: am654: Add thermal
zones") introduced thermal-zones for am654, it defined as under the
common am65-wakeup bus segment, when it is am654 specific (other SoC
spins can have slightly different thermal characteristics). Futher,
thermal-zones is introduced under simple-bus node, when it has no
actual register or base address.
So, move it to it's rightful place under am654 SoC dtsi under the base
node.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Keerthy <j-keerthy@ti.com>
Link: https://lore.kernel.org/r/20210916181801.32588-1-nm@ti.com
-rw-r--r-- | arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi | 4 | ||||
-rw-r--r-- | arch/arm64/boot/dts/ti/k3-am654.dtsi | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi index 9d21cdf6fce8..9c69d0917f69 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi @@ -100,8 +100,4 @@ power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>; #thermal-sensor-cells = <1>; }; - - thermal_zones: thermal-zones { - #include "k3-am654-industrial-thermal.dtsi" - }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am654.dtsi b/arch/arm64/boot/dts/ti/k3-am654.dtsi index f0a6541b8042..a89257900047 100644 --- a/arch/arm64/boot/dts/ti/k3-am654.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am654.dtsi @@ -112,4 +112,8 @@ compatible = "cache"; cache-level = <3>; }; + + thermal_zones: thermal-zones { + #include "k3-am654-industrial-thermal.dtsi" + }; }; |