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authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2022-02-21 18:54:41 +0200
committerLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2022-03-03 14:06:04 +0200
commit8ba3c7bd4dca7ac358e834eabf840012d9564356 (patch)
tree63b3920a3c729bc1bc063b750fba1e9a724f8b57
parentaaaf9361f0348dd13131e392190b3793e135f7e3 (diff)
drm: rcar-du: Don't restart group when enabling plane on Gen3
On Gen3 hardware enabling a VSP plane doesn't change any register that requires DRES to take effect. Avoid a group restart in that case. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
-rw-r--r--drivers/gpu/drm/rcar-du/rcar_du_plane.c6
-rw-r--r--drivers/gpu/drm/rcar-du/rcar_du_vsp.c9
2 files changed, 6 insertions, 9 deletions
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_plane.c b/drivers/gpu/drm/rcar-du/rcar_du_plane.c
index 9b058d6cb032..22aeeb1cc1fb 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_plane.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_plane.c
@@ -560,6 +560,12 @@ void __rcar_du_plane_setup(struct rcar_du_group *rgrp,
if (rcdu->vspd1_sink != vspd1_sink) {
rcdu->vspd1_sink = vspd1_sink;
rcar_du_set_dpad0_vsp1_routing(rcdu);
+
+ /*
+ * Changes to the VSP1 sink take effect on DRES and thus
+ * need a restart of the group.
+ */
+ rgrp->need_restart = true;
}
}
}
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
index b7fc5b069cbc..32530d698e75 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
@@ -84,15 +84,6 @@ void rcar_du_vsp_enable(struct rcar_du_crtc *crtc)
__rcar_du_plane_setup(crtc->group, &state);
- /*
- * Ensure that the plane source configuration takes effect by requesting
- * a restart of the group. See rcar_du_plane_atomic_update() for a more
- * detailed explanation.
- *
- * TODO: Check whether this is still needed on Gen3.
- */
- crtc->group->need_restart = true;
-
vsp1_du_setup_lif(crtc->vsp->vsp, crtc->vsp_pipe, &cfg);
}