diff options
| author | Imre Deak <imre.deak@intel.com> | 2016-11-28 17:29:27 +0200 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2016-12-02 16:32:44 +0200 |
| commit | 8bf41b7298b3b20de3f4a4e70ab58042648f963e (patch) | |
| tree | a77f0dc8ffd90496bb8b44ead0c223c025e7963b | |
| parent | f55d23be11ed15f493957246f3b81fc530e79d70 (diff) | |
drm/i915/gen6+: Clear upper data byte during PCODE write
The spec calls for the upper data byte to be cleared before most of the
PCODE write commands, for others like IPS control it doesn't say
anything about this byte. Let's clear it in case it's clobbered somehow,
especially that there are places where we only do a PCODE write without
a preceding PCODE read.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1480346969-16121-1-git-send-email-imre.deak@intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index adf208fc6a2d..b7fa1fa7d669 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -7838,6 +7838,7 @@ int sandybridge_pcode_write(struct drm_i915_private *dev_priv, } I915_WRITE_FW(GEN6_PCODE_DATA, val); + I915_WRITE_FW(GEN6_PCODE_DATA1, 0); I915_WRITE_FW(GEN6_PCODE_MAILBOX, GEN6_PCODE_READY | mbox); if (intel_wait_for_register_fw(dev_priv, |