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authorVladimir Zapolskiy <vladimir_zapolskiy@mentor.com>2016-11-17 03:30:51 +0200
committerShawn Guo <shawnguo@kernel.org>2017-01-02 13:59:53 +0800
commitaf92305e567b7f4c9cf48b9e46c1f48ec9ffb1fb (patch)
treec5c603b3d7498194f364e7f94c58c487e5cf1602
parent0c744ea4f77d72b3dcebb7a8f2684633ec79be88 (diff)
ARM: dts: imx31: fix AVIC base address
On i.MX31 AVIC interrupt controller base address is at 0x68000000. The problem was shadowed by the AVIC driver, which takes the correct base address from a SoC specific header file. Fixes: d2a37b3d91f4 ("ARM i.MX31: Add devicetree support") Signed-off-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-rw-r--r--arch/arm/boot/dts/imx31.dtsi4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx31.dtsi b/arch/arm/boot/dts/imx31.dtsi
index 685916e3d8a1..85cd8be22f71 100644
--- a/arch/arm/boot/dts/imx31.dtsi
+++ b/arch/arm/boot/dts/imx31.dtsi
@@ -31,11 +31,11 @@
};
};
- avic: avic-interrupt-controller@60000000 {
+ avic: interrupt-controller@68000000 {
compatible = "fsl,imx31-avic", "fsl,avic";
interrupt-controller;
#interrupt-cells = <1>;
- reg = <0x60000000 0x100000>;
+ reg = <0x68000000 0x100000>;
};
soc {