diff options
| author | Imre Deak <imre.deak@intel.com> | 2022-06-17 14:28:07 +0300 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2022-07-18 15:17:41 +0300 |
| commit | c19491894d4baf2155387e48aa326e1b52d7b986 (patch) | |
| tree | 8a7ca8e5e5af9de5ba1d5417f6f686ec311ba9a4 | |
| parent | 81cb44274c654e49f55e6690079540b0bd177db0 (diff) | |
drm/i915/tgl+: Fix HDMI transcoder clock vs. DDI BUF disabling order
Starting with TGL the disabling order of HDMI transcoder clock vs. DDI
BUF has swapped, fix this. There hasn't been any issues seen related to
this, but let's follow the spec.
Reported-by: Sandeep K Lakkakula <sandeep.k.lakkakula@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220617112807.1586621-1-imre.deak@intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_ddi.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index f76eb6e345ec..ec131973f374 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -2691,10 +2691,14 @@ static void intel_ddi_post_disable_hdmi(struct intel_atomic_state *state, dig_port->set_infoframes(encoder, false, old_crtc_state, old_conn_state); - intel_ddi_disable_pipe_clock(old_crtc_state); + if (DISPLAY_VER(dev_priv) < 12) + intel_ddi_disable_pipe_clock(old_crtc_state); intel_disable_ddi_buf(encoder, old_crtc_state); + if (DISPLAY_VER(dev_priv) >= 12) + intel_ddi_disable_pipe_clock(old_crtc_state); + intel_display_power_put(dev_priv, dig_port->ddi_io_power_domain, fetch_and_zero(&dig_port->ddi_io_wakeref)); |