diff options
author | Olof Johansson <olof@lixom.net> | 2015-04-03 10:55:21 -0700 |
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committer | Olof Johansson <olof@lixom.net> | 2015-04-03 10:55:21 -0700 |
commit | c6746958bc1ea33489c946aec1b90114e9d9e74b (patch) | |
tree | 266516012143d29010c5129032f6eeb95361d76f /arch/arm/boot | |
parent | 263c3f50bec8f868aa454d78ae2809c28e0f8cf8 (diff) | |
parent | 7776ab70d75ff9857343e44e428744d81c30ce1b (diff) |
Merge tag 'mvebu-dt-4.1-2' of git://git.infradead.org/linux-mvebu into next/dt
Merge "ARM: mvebu: dt changes for v4.1 (round 2)" from Gregory Clement:
mvebu dt changes for v4.1 (part #2)
- add support for Performance Monitor Unit on most of mvebu SoCs
- add nas2big support
- add support for USB3 port On Armada 385 AP
* tag 'mvebu-dt-4.1-2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: armada-385-ap: Enable USB3 port
ARM: mvebu: Enable Performance Monitor Unit on Armada 380/385 SoC
ARM: mvebu: Enable Performance Monitor Unit on Armada 375 SoC
ARM: mvebu: Enable Performance Monitor Unit on Armada XP/370 SoCs
ARM: Kirkwood: add DT description for nas2big
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r-- | arch/arm/boot/dts/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/boot/dts/armada-370-xp.dtsi | 5 | ||||
-rw-r--r-- | arch/arm/boot/dts/armada-375.dtsi | 5 | ||||
-rw-r--r-- | arch/arm/boot/dts/armada-385-db-ap.dts | 28 | ||||
-rw-r--r-- | arch/arm/boot/dts/armada-38x.dtsi | 5 | ||||
-rw-r--r-- | arch/arm/boot/dts/kirkwood-nas2big.dts | 143 |
6 files changed, 187 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 7f85ca083b4a..0df8721c96e0 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -170,6 +170,7 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \ kirkwood-lsxhl.dtb \ kirkwood-mplcec4.dtb \ kirkwood-mv88f6281gtw-ge.dtb \ + kirkwood-nas2big.dtb \ kirkwood-net2big.dtb \ kirkwood-net5big.dtb \ kirkwood-netgear_readynas_duo_v2.dtb \ diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi index 7b3393e264f8..ec96f0b36346 100644 --- a/arch/arm/boot/dts/armada-370-xp.dtsi +++ b/arch/arm/boot/dts/armada-370-xp.dtsi @@ -73,6 +73,11 @@ }; }; + pmu { + compatible = "arm,cortex-a9-pmu"; + interrupts-extended = <&mpic 3>; + }; + soc { #address-cells = <2>; #size-cells = <1>; diff --git a/arch/arm/boot/dts/armada-375.dtsi b/arch/arm/boot/dts/armada-375.dtsi index c6fedf2bfe3d..c675257f2377 100644 --- a/arch/arm/boot/dts/armada-375.dtsi +++ b/arch/arm/boot/dts/armada-375.dtsi @@ -96,6 +96,11 @@ }; }; + pmu { + compatible = "arm,cortex-a9-pmu"; + interrupts-extended = <&mpic 3>; + }; + soc { compatible = "marvell,armada375-mbus", "simple-bus"; #address-cells = <2>; diff --git a/arch/arm/boot/dts/armada-385-db-ap.dts b/arch/arm/boot/dts/armada-385-db-ap.dts index d6b0f7db9624..7219ac3a3d90 100644 --- a/arch/arm/boot/dts/armada-385-db-ap.dts +++ b/arch/arm/boot/dts/armada-385-db-ap.dts @@ -125,6 +125,13 @@ status = "okay"; }; + pinctrl@18000 { + xhci0_vbus_pins: xhci0-vbus-pins { + marvell,pins = "mpp44"; + marvell,function = "gpio"; + }; + }; + ethernet@30000 { status = "okay"; phy = <&phy2>; @@ -162,6 +169,11 @@ marvell,nand-enable-arbiter; nand-on-flash-bbt; }; + + usb3@f0000 { + status = "okay"; + usb-phy = <&usb3_phy>; + }; }; pcie-controller { @@ -187,4 +199,20 @@ }; }; }; + + usb3_phy: usb3_phy { + compatible = "usb-nop-xceiv"; + vcc-supply = <®_xhci0_vbus>; + }; + + reg_xhci0_vbus: xhci0-vbus { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&xhci0_vbus_pins>; + regulator-name = "xhci0-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>; + }; }; diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi index 1a2dc370792f..ed2dd8ba4080 100644 --- a/arch/arm/boot/dts/armada-38x.dtsi +++ b/arch/arm/boot/dts/armada-38x.dtsi @@ -63,6 +63,11 @@ serial1 = &uart1; }; + pmu { + compatible = "arm,cortex-a9-pmu"; + interrupts-extended = <&mpic 3>; + }; + soc { compatible = "marvell,armada380-mbus", "simple-bus"; #address-cells = <2>; diff --git a/arch/arm/boot/dts/kirkwood-nas2big.dts b/arch/arm/boot/dts/kirkwood-nas2big.dts new file mode 100644 index 000000000000..7427ec50b829 --- /dev/null +++ b/arch/arm/boot/dts/kirkwood-nas2big.dts @@ -0,0 +1,143 @@ +/* + * Device Tree file for LaCie 2Big NAS + * + * Copyright (C) 2015 Seagate + * + * Author: Simon Guinot <simon.guinot@sequanux.org> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. +*/ + +/dts-v1/; + +#include "kirkwood-netxbig.dtsi" + +/ { + model = "LaCie 2Big NAS"; + compatible = "lacie,nas2big", "lacie,netxbig", "marvell,kirkwood-88f6282", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x10000000>; + }; + + chosen { + bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; + }; + + mbus { + pcie-controller { + status = "okay"; + + pcie@1,0 { + status = "okay"; + }; + }; + }; + + ocp@f1000000 { + rtc@10300 { + /* The on-chip RTC is not powered (no supercap). */ + status = "disabled"; + }; + spi@10600 { + /* + * A NAND flash is used instead of an SPI flash for + * the other netxbig-compatible boards. + */ + status = "disabled"; + }; + }; + + fan { + /* + * An I2C fan controller (GMT G762) is used but alarm is + * wired to a separate GPIO. + */ + compatible = "gpio-fan"; + alarm-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>; + }; + + regulators: regulators { + status = "okay"; + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + + regulator@2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "hdd1power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 17 GPIO_ACTIVE_HIGH>; + }; + clocks { + g762_clk: g762-oscillator { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; + }; +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; +}; + +&i2c0 { + status = "okay"; + + /* + * An external I2C RTC (Dallas DS1337S+) is used. This allows + * to power-up the board on an RTC alarm. The external RTC can + * be kept powered, even when the SoC is off. + */ + rtc@68 { + compatible = "dallas,ds1307"; + reg = <0x68>; + interrupts = <43>; + }; + g762@3e { + compatible = "gmt,g762"; + reg = <0x3e>; + clocks = <&g762_clk>; + }; +}; + +&nand { + chip-delay = <50>; + status = "okay"; + + partition@0 { + label = "U-Boot"; + reg = <0x0 0x100000>; + }; + + partition@100000 { + label = "uImage"; + reg = <0x100000 0x1000000>; + }; + + partition@1100000 { + label = "root"; + reg = <0x1100000 0x8000000>; + }; + + partition@9100000 { + label = "unused"; + reg = <0x9100000 0x6f00000>; + }; +}; |