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authorEddie Cai <eddie.cai.linux@gmail.com>2020-10-20 16:38:50 -0300
committerHeiko Stuebner <heiko@sntech.de>2020-11-30 17:03:38 +0100
commitef098edc9c245dd1c150001e22c78e6a3ffd7ff8 (patch)
tree55191a657065b7f7489eae586a6046d5eb4c248b /arch/arm64/boot/dts/rockchip
parent97a0115cd96a173369ef30eee2290184921b3f24 (diff)
arm64: dts: rockchip: add isp and sensors for Scarlet
Enable ISP and camera sensor ov2685 and ov5695 for Scarlet Chromebook Verified with: make ARCH=arm64 dtbs_check Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com> Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com> Signed-off-by: Tomasz Figa <tfiga@chromium.org> Signed-off-by: Helen Koike <helen.koike@collabora.com> Reviewed-by: Tomasz Figa <tfiga@chromium.org> Link: https://lore.kernel.org/r/20201020193850.1460644-10-helen.koike@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip')
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi74
1 files changed, 74 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi
index 60cd1c18cd4e..beee5fbb3443 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi
@@ -296,6 +296,52 @@ camera: &i2c7 {
/* 24M mclk is shared between world and user cameras */
pinctrl-0 = <&i2c7_xfer &test_clkout1>;
+
+ /* Rear-facing camera */
+ wcam: camera@36 {
+ compatible = "ovti,ov5695";
+ reg = <0x36>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&wcam_rst>;
+
+ clocks = <&cru SCLK_TESTCLKOUT1>;
+ clock-names = "xvclk";
+
+ avdd-supply = <&pp2800_cam>;
+ dvdd-supply = <&pp1250_cam>;
+ dovdd-supply = <&pp1800_s0>;
+ reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
+
+ port {
+ wcam_out: endpoint {
+ remote-endpoint = <&mipi_in_wcam>;
+ data-lanes = <1 2>;
+ };
+ };
+ };
+
+ /* Front-facing camera */
+ ucam: camera@3c {
+ compatible = "ovti,ov2685";
+ reg = <0x3c>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ucam_rst>;
+
+ clocks = <&cru SCLK_TESTCLKOUT1>;
+ clock-names = "xvclk";
+
+ avdd-supply = <&pp2800_cam>;
+ dovdd-supply = <&pp1800_s0>;
+ dvdd-supply = <&pp1800_s0>;
+ reset-gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
+
+ port {
+ ucam_out: endpoint {
+ remote-endpoint = <&mipi_in_ucam>;
+ data-lanes = <1>;
+ };
+ };
+ };
};
&cdn_dp {
@@ -353,10 +399,38 @@ camera: &i2c7 {
gpio1830-supply = <&pp1800_s0>; /* APIO4_VDD; 4c 4d */
};
+&isp0 {
+ status = "okay";
+
+ ports {
+ port@0 {
+ mipi_in_wcam: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&wcam_out>;
+ data-lanes = <1 2>;
+ };
+
+ mipi_in_ucam: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&ucam_out>;
+ data-lanes = <1>;
+ };
+ };
+ };
+};
+
+&isp0_mmu {
+ status = "okay";
+};
+
&max98357a {
sdmode-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
};
+&mipi_dphy_rx0 {
+ status = "okay";
+};
+
&mipi_dsi {
status = "okay";
clock-master;