diff options
| author | Kevin Hilman <khilman@ti.com> | 2011-04-22 12:02:05 -0700 |
|---|---|---|
| committer | Kevin Hilman <khilman@ti.com> | 2011-06-16 11:14:09 -0700 |
| commit | 9942da0e4b037a852b230208410141768d473deb (patch) | |
| tree | 71b4938b9a8ca1a8643876a221b546c578cc8b36 /arch/arm | |
| parent | f64ad1a0e21a4948894c7a1b6f2f03b5e7151ddf (diff) | |
gpio/omap: debounce remove SoC specific registers, use pdata
Use register offsets passed in from pdata for accessing debounce registers.
Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-omap2/gpio.c | 4 | ||||
| -rw-r--r-- | arch/arm/plat-omap/include/plat/gpio.h | 2 |
2 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c index cc26677a12f8..316d930651f1 100644 --- a/arch/arm/mach-omap2/gpio.c +++ b/arch/arm/mach-omap2/gpio.c @@ -81,6 +81,8 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) pdata->regs->irqenable = OMAP24XX_GPIO_IRQENABLE1; pdata->regs->set_irqenable = OMAP24XX_GPIO_SETIRQENABLE1; pdata->regs->clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1; + pdata->regs->debounce = OMAP24XX_GPIO_DEBOUNCE_VAL; + pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN; break; case 2: pdata->bank_type = METHOD_GPIO_44XX; @@ -94,6 +96,8 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) pdata->regs->irqenable = OMAP4_GPIO_IRQSTATUSSET0; pdata->regs->set_irqenable = OMAP4_GPIO_IRQSTATUSSET0; pdata->regs->clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0; + pdata->regs->debounce = OMAP4_GPIO_DEBOUNCINGTIME; + pdata->regs->debounce_en = OMAP4_GPIO_DEBOUNCENABLE; break; default: WARN(1, "Invalid gpio bank_type\n"); diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h index c7e3a56340c0..7a3f067ee532 100644 --- a/arch/arm/plat-omap/include/plat/gpio.h +++ b/arch/arm/plat-omap/include/plat/gpio.h @@ -185,6 +185,8 @@ struct omap_gpio_reg_offs { u16 irqenable; u16 set_irqenable; u16 clr_irqenable; + u16 debounce; + u16 debounce_en; bool irqenable_inv; }; |