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author | Like Xu <likexu@tencent.com> | 2022-08-31 16:53:24 +0800 |
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committer | Sean Christopherson <seanjc@google.com> | 2022-09-28 12:47:22 -0700 |
commit | cf52de619c67bd1f6b1cf2751c3827815f74a5a5 (patch) | |
tree | 6732b9f1731b7e3eb20b8b6f7280ca9d70098651 /arch/loongarch/lib | |
parent | c0245b774203f7341ddb1cce29a6ee607857f325 (diff) |
KVM: x86/pmu: Avoid using PEBS perf_events for normal counters
The check logic in the pmc_resume_counter() to determine whether
a perf_event is reusable is partial and flawed, especially when it
comes to a pseudocode sequence (contrived, but valid) like:
- enabling a counter and its PEBS bit
- enable global_ctrl
- run workload
- disable only the PEBS bit, leaving the global_ctrl bit enabled
In this corner case, a perf_event created for PEBS can be reused by
a normal counter before it has been released and recreated, and when this
normal counter overflows, it triggers a PEBS interrupt (precise_ip != 0).
To address this issue, reprogram all affected counters when PEBS_ENABLE
change and reuse a counter if and only if PEBS exactly matches precise.
Fixes: 79f3e3b58386 ("KVM: x86/pmu: Reprogram PEBS event to emulate guest PEBS counter")
Signed-off-by: Like Xu <likexu@tencent.com>
Link: https://lore.kernel.org/r/20220831085328.45489-4-likexu@tencent.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
Diffstat (limited to 'arch/loongarch/lib')
0 files changed, 0 insertions, 0 deletions