diff options
author | Paul Burton <paul.burton@imgtec.com> | 2014-02-14 16:30:52 +0000 |
---|---|---|
committer | Paul Burton <paul.burton@imgtec.com> | 2014-05-02 16:39:13 +0100 |
commit | 76306f4272e036e600254a98bc291df50cedd949 (patch) | |
tree | c06e7c4a48fe4b5276747bc3ad03fa22918689e7 /arch/mips/include/asm/smp.h | |
parent | cc7964af8f997a20240d3ec5bf90c4fd20d3c48a (diff) |
MIPS: introduce cpu_coherent_mask
Add a mask of CPUs which are currently known to be operating coherently.
This is setup initially to be all present CPUs, but in a subsequent
patch CPUs in a MIPS Coherent Processing System will be cleared in this
mask as they enter non-coherent idle states. This will be used in order
to determine when a CPU within a CPS system may need to be powered back
up, but may also be used in future to optimise away wakeups for cache
operations or TLB invalidations.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Diffstat (limited to 'arch/mips/include/asm/smp.h')
-rw-r--r-- | arch/mips/include/asm/smp.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/mips/include/asm/smp.h b/arch/mips/include/asm/smp.h index efa02acd3dd5..b037334fca22 100644 --- a/arch/mips/include/asm/smp.h +++ b/arch/mips/include/asm/smp.h @@ -46,6 +46,9 @@ extern int __cpu_logical_map[NR_CPUS]; extern volatile cpumask_t cpu_callin_map; +/* Mask of CPUs which are currently definitely operating coherently */ +extern cpumask_t cpu_coherent_mask; + extern void asmlinkage smp_bootstrap(void); /* |