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authorChristoph Hellwig <hch@lst.de>2019-08-13 11:27:56 +0200
committerChristoph Hellwig <hch@lst.de>2019-11-11 21:18:20 +0100
commit38af57825313f6c9404b42c4e4fa22311f60383a (patch)
tree024d79648181663339e4a8d521ef7f561cacb2f2 /arch/riscv/include/asm/io.h
parent80b0ca98f91ddbc09828aff5a00af1c73837713e (diff)
riscv: use the generic ioremap code
Use the generic ioremap code instead of providing a local version. Note that this relies on the asm-generic no-op definition of pgprot_noncached. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Paul Walmsley <paul.walmsley@sifive.com> Tested-by: Paul Walmsley <paul.walmsley@sifive.com> # rv32, rv64 boot Acked-by: Paul Walmsley <paul.walmsley@sifive.com> # arch/riscv
Diffstat (limited to 'arch/riscv/include/asm/io.h')
-rw-r--r--arch/riscv/include/asm/io.h3
1 files changed, 0 insertions, 3 deletions
diff --git a/arch/riscv/include/asm/io.h b/arch/riscv/include/asm/io.h
index 8a5733c09e45..1dd26d964170 100644
--- a/arch/riscv/include/asm/io.h
+++ b/arch/riscv/include/asm/io.h
@@ -15,9 +15,6 @@
#include <asm/mmiowb.h>
#include <asm/pgtable.h>
-extern void __iomem *ioremap(phys_addr_t offset, unsigned long size);
-extern void iounmap(volatile void __iomem *addr);
-
/* Generic IO read/write. These perform native-endian accesses. */
#define __raw_writeb __raw_writeb
static inline void __raw_writeb(u8 val, volatile void __iomem *addr)