diff options
| author | Roland Stigge <stigge@antcom.de> | 2012-02-08 21:41:02 +0100 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2012-02-09 15:55:50 -0800 |
| commit | f40a6818857e00c1d0ecec9af832f46a83f12f53 (patch) | |
| tree | d28695cae6ea9c343f6968c31ea3c61bad86f451 /arch | |
| parent | 8998316c425ed2b36ca3b01a658f08a7d006a4f9 (diff) | |
ARM: LPC32xx: clock.c: jiffies wrapping
This patch fixes the jiffies wrapping bug in clock.c.
It corrects the timeout computation based on jiffies, uses time_before() for
correct wrapping handling and replaces a binary "&" which should really be a
logical "&&" in a truth expression.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Wolfram Sang <w.sang@pengutronix.de>
Tested-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Kevin Wells <kevin.wells@nxp.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-lpc32xx/clock.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-lpc32xx/clock.c b/arch/arm/mach-lpc32xx/clock.c index 09dfa490a218..6a15e3655a57 100644 --- a/arch/arm/mach-lpc32xx/clock.c +++ b/arch/arm/mach-lpc32xx/clock.c @@ -129,7 +129,7 @@ static struct clk osc_32KHz = { static int local_pll397_enable(struct clk *clk, int enable) { u32 reg; - unsigned long timeout = 1 + msecs_to_jiffies(10); + unsigned long timeout = jiffies + msecs_to_jiffies(10); reg = __raw_readl(LPC32XX_CLKPWR_PLL397_CTRL); @@ -144,7 +144,7 @@ static int local_pll397_enable(struct clk *clk, int enable) /* Wait for PLL397 lock */ while (((__raw_readl(LPC32XX_CLKPWR_PLL397_CTRL) & LPC32XX_CLKPWR_SYSCTRL_PLL397_STS) == 0) && - (timeout > jiffies)) + time_before(jiffies, timeout)) cpu_relax(); if ((__raw_readl(LPC32XX_CLKPWR_PLL397_CTRL) & @@ -158,7 +158,7 @@ static int local_pll397_enable(struct clk *clk, int enable) static int local_oscmain_enable(struct clk *clk, int enable) { u32 reg; - unsigned long timeout = 1 + msecs_to_jiffies(10); + unsigned long timeout = jiffies + msecs_to_jiffies(10); reg = __raw_readl(LPC32XX_CLKPWR_MAIN_OSC_CTRL); @@ -173,7 +173,7 @@ static int local_oscmain_enable(struct clk *clk, int enable) /* Wait for main oscillator to start */ while (((__raw_readl(LPC32XX_CLKPWR_MAIN_OSC_CTRL) & LPC32XX_CLKPWR_MOSC_DISABLE) != 0) && - (timeout > jiffies)) + time_before(jiffies, timeout)) cpu_relax(); if ((__raw_readl(LPC32XX_CLKPWR_MAIN_OSC_CTRL) & @@ -385,7 +385,7 @@ static int local_usbpll_enable(struct clk *clk, int enable) { u32 reg; int ret = -ENODEV; - unsigned long timeout = 1 + msecs_to_jiffies(10); + unsigned long timeout = jiffies + msecs_to_jiffies(10); reg = __raw_readl(LPC32XX_CLKPWR_USB_CTRL); @@ -398,7 +398,7 @@ static int local_usbpll_enable(struct clk *clk, int enable) __raw_writel(reg, LPC32XX_CLKPWR_USB_CTRL); /* Wait for PLL lock */ - while ((timeout > jiffies) & (ret == -ENODEV)) { + while (time_before(jiffies, timeout) && (ret == -ENODEV)) { reg = __raw_readl(LPC32XX_CLKPWR_USB_CTRL); if (reg & LPC32XX_CLKPWR_USBCTRL_PLL_STS) ret = 0; |