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authorArnd Bergmann <arnd@arndb.de>2019-08-09 16:40:37 +0200
committerArnd Bergmann <arnd@arndb.de>2019-08-15 21:34:02 +0200
commitffba29c9ebd0977dbf77bf6064776716a51b8ae5 (patch)
treec6d42d43db9fd1800228073b61d4abc27485bbc9 /arch
parent35974a7cc23c5deb5597c0a42183172498c4a0a8 (diff)
serial: lpc32xx: allow compile testing
The lpc32xx_loopback_set() function in hte lpc32xx_hs driver is the one thing that relies on platform header files. Move that into the core platform code so we only need a variable declaration for it, and enable COMPILE_TEST building. Link: https://lore.kernel.org/r/20190809144043.476786-12-arnd@arndb.de Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-lpc32xx/serial.c30
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm/mach-lpc32xx/serial.c b/arch/arm/mach-lpc32xx/serial.c
index 3f9b30df9f0e..cfb35e5691cd 100644
--- a/arch/arm/mach-lpc32xx/serial.c
+++ b/arch/arm/mach-lpc32xx/serial.c
@@ -60,6 +60,36 @@ static struct uartinit uartinit_data[] __initdata = {
},
};
+/* LPC3250 Errata HSUART.1: Hang workaround via loopback mode on inactivity */
+void lpc32xx_loopback_set(resource_size_t mapbase, int state)
+{
+ int bit;
+ u32 tmp;
+
+ switch (mapbase) {
+ case LPC32XX_HS_UART1_BASE:
+ bit = 0;
+ break;
+ case LPC32XX_HS_UART2_BASE:
+ bit = 1;
+ break;
+ case LPC32XX_HS_UART7_BASE:
+ bit = 6;
+ break;
+ default:
+ WARN(1, "lpc32xx_hs: Warning: Unknown port at %08x\n", mapbase);
+ return;
+ }
+
+ tmp = readl(LPC32XX_UARTCTL_CLOOP);
+ if (state)
+ tmp |= (1 << bit);
+ else
+ tmp &= ~(1 << bit);
+ writel(tmp, LPC32XX_UARTCTL_CLOOP);
+}
+EXPORT_SYMBOL_GPL(lpc32xx_loopback_set);
+
void __init lpc32xx_serial_init(void)
{
u32 tmp, clkmodes = 0;