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| author | Dmitry Osipenko <digetx@gmail.com> | 2020-12-18 15:02:44 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-01-13 11:26:34 +0100 |
| commit | a1fdd107cd0c7cf3a575c994cc2766c67b6689e0 (patch) | |
| tree | 0135199cae5ed47bc78b0ec173b2ac462ea81948 /block | |
| parent | a728f91bcc70dc9c7f50ac25a37806c0bbb7108b (diff) | |
usb: chipidea: tegra: Specify TX FIFO threshold in UDC SoC info
The UDC/OTG controller could be switched to a host mode and the
TXFILLTUNING register needs to be programmed properly for the host
mode. Hence specify the TX FIFO threshold in the UDC SoC info.
Acked-by: Peter Chen <peter.chen@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Link: https://lore.kernel.org/r/20201218120246.7759-8-digetx@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'block')
0 files changed, 0 insertions, 0 deletions