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authorViresh Kumar <viresh.kumar@st.com>2011-11-17 16:01:29 +0530
committerVinod Koul <vinod.koul@linux.intel.com>2011-11-28 08:48:02 +0530
commit61e183f8306934a9f66557f69f1f0f56f18dca06 (patch)
tree07f205fe60f4d5fe5a69a5406789e7510effd20f /drivers/dma/dw_dmac_regs.h
parente69664336d6400cc1685716ee5f04ef74e85703e (diff)
dmaengine/dw_dmac: Reconfigure interrupt and chan_cfg register on resume
In S2R all DMA registers are reset by hardware and thus they are required to be reprogrammed. The channels which aren't reprogrammed are channel configuration and interrupt enable registers, which are currently programmed at chan_alloc time. This patch creates another routine to initialize a channel. It will try to initialize channel on every dwc_dostart() call. If channel is already initialised then it simply returns, otherwise it configures registers. This routine will also initialize registers on wakeup from S2R, as we mark channels as uninitialized on suspend. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
Diffstat (limited to 'drivers/dma/dw_dmac_regs.h')
-rw-r--r--drivers/dma/dw_dmac_regs.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/dma/dw_dmac_regs.h b/drivers/dma/dw_dmac_regs.h
index c3419518d701..5eef6946a367 100644
--- a/drivers/dma/dw_dmac_regs.h
+++ b/drivers/dma/dw_dmac_regs.h
@@ -140,6 +140,7 @@ struct dw_dma_chan {
u8 mask;
u8 priority;
bool paused;
+ bool initialized;
spinlock_t lock;