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| author | Gabriel Fernandez <gabriel.fernandez@st.com> | 2018-03-08 17:53:58 +0100 |
|---|---|---|
| committer | Michael Turquette <mturquette@baylibre.com> | 2018-03-11 15:40:33 -0700 |
| commit | c6cf4d3248980c5e1998ce21f3c2d86502f7e1a9 (patch) | |
| tree | 29720b145816929e73d9e32a3e2f3aef535a1b73 /drivers/gpu/drm/amd/amdgpu/amdgpu_trace_points.c | |
| parent | dc32eaac4926b02fddba3ff02030827429394ad7 (diff) | |
clk: stm32mp1: add PLL clocks
STMP32MP1 has 4 PLLs.
PLL supports integer and fractional mode.
Each PLL has 3 output dividers (p, q, r)
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_trace_points.c')
0 files changed, 0 insertions, 0 deletions