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| author | Arun Siluvery <arun.siluvery@linux.intel.com> | 2015-06-23 15:46:57 +0100 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-06-24 00:22:38 +0200 |
| commit | 0160f055393f457f8f218377bc088207eb502c38 (patch) | |
| tree | 7f8cd56877bb72b3f1b5f52186d3b146bc988a42 /drivers/gpu/drm/i915/intel_frontbuffer.c | |
| parent | 9fb73863cc3eda7476e88a03e8b125b3d309b7b3 (diff) | |
drm/i915/gen8: Add WaClearSlmSpaceAtContextSwitch workaround
In Indirect context w/a batch buffer,
WaClearSlmSpaceAtContextSwitch
This WA performs writes to scratch page so it must be valid, this check
is performed before initializing the batch with this WA.
v2: s/PIPE_CONTROL_FLUSH_RO_CACHES/PIPE_CONTROL_FLUSH_L3 (Ville)
v3: GTT bit in scratch address should be mbz (Chris)
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Dave Gordon <david.s.gordon@intel.com>
Signed-off-by: Rafael Barbalho <rafael.barbalho@intel.com>
Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_frontbuffer.c')
0 files changed, 0 insertions, 0 deletions