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| author | Mauro Carvalho Chehab <mchehab@s-opensource.com> | 2017-11-14 10:47:01 -0500 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab@s-opensource.com> | 2017-11-14 10:47:01 -0500 |
| commit | f2ecc3d0787e05d9145722feed01d4a11ab6bec1 (patch) | |
| tree | 8b952af40dad67d728f1e421efc640907c523982 /drivers/gpu/drm/i915/intel_pm.c | |
| parent | b1cb7372fa822af6c06c8045963571d13ad6348b (diff) | |
| parent | c14dd9d5f8beda9d8c621683b4e7d6cb5cd3cda7 (diff) | |
Merge tag 'staging-4.15-rc1' into v4l_for_linus
There are some conflicts between staging and media trees,
as reported by Stephen Rothwell <sfr@canb.auug.org.au>.
So, merge from staging.
* tag 'staging-4.15-rc1': (775 commits)
staging: lustre: add SPDX identifiers to all lustre files
staging: greybus: Remove redundant license text
staging: greybus: add SPDX identifiers to all greybus driver files
staging: ccree: simplify ioread/iowrite
staging: ccree: simplify registers access
staging: ccree: simplify error handling logic
staging: ccree: remove dead code
staging: ccree: handle limiting of DMA masks
staging: ccree: copy IV to DMAable memory
staging: fbtft: remove redundant initialization of buf
staging: sm750fb: Fix parameter mistake in poke32
staging: wilc1000: Fix bssid buffer offset in Txq
staging: fbtft: fb_ssd1331: fix mirrored display
staging: android: Fix checkpatch.pl error
staging: greybus: loopback: convert loopback to use generic async operations
staging: greybus: operation: add private data with get/set accessors
staging: greybus: loopback: Fix iteration count on async path
staging: greybus: loopback: Hold per-connection mutex across operations
staging: greybus/loopback: use ktime_get() for time intervals
staging: fsl-dpaa2/eth: Extra headroom in RX buffers
...
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index ed662937ec3c..0a09f8ff6aff 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -8245,14 +8245,17 @@ static void gen8_set_l3sqc_credits(struct drm_i915_private *dev_priv, int high_prio_credits) { u32 misccpctl; + u32 val; /* WaTempDisableDOPClkGating:bdw */ misccpctl = I915_READ(GEN7_MISCCPCTL); I915_WRITE(GEN7_MISCCPCTL, misccpctl & ~GEN7_DOP_CLOCK_GATE_ENABLE); - I915_WRITE(GEN8_L3SQCREG1, - L3_GENERAL_PRIO_CREDITS(general_prio_credits) | - L3_HIGH_PRIO_CREDITS(high_prio_credits)); + val = I915_READ(GEN8_L3SQCREG1); + val &= ~L3_PRIO_CREDITS_MASK; + val |= L3_GENERAL_PRIO_CREDITS(general_prio_credits); + val |= L3_HIGH_PRIO_CREDITS(high_prio_credits); + I915_WRITE(GEN8_L3SQCREG1, val); /* * Wait at least 100 clocks before re-enabling clock gating. |