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| author | Maxime Ripard <maxime.ripard@bootlin.com> | 2019-01-24 11:03:16 +0100 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2019-01-24 11:03:16 +0100 |
| commit | d2c20b5d37820876a8beea4d8d0bc59147077dd5 (patch) | |
| tree | ae032c4de299cb8f14275514c5cec634bc46b591 /drivers/gpu/drm/i915/intel_runtime_pm.c | |
| parent | b30b61ff6b1dc37f276cf56a8328b80086a3ffca (diff) | |
| parent | 8ca4fd0406b41a872055048d694f3702d8eddb76 (diff) | |
Merge drm/drm-next into drm-misc-next
danvet needs a backmerge to ease the upcoming drmP.h rework
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_runtime_pm.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_runtime_pm.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 4350a5270423..9e9501f82f06 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -509,7 +509,7 @@ static bool hsw_power_well_enabled(struct drm_i915_private *dev_priv, * BIOS's own request bits, which are forced-on for these power wells * when exiting DC5/6. */ - if (IS_GEN9(dev_priv) && !IS_GEN9_LP(dev_priv) && + if (IS_GEN(dev_priv, 9) && !IS_GEN9_LP(dev_priv) && (id == SKL_DISP_PW_1 || id == SKL_DISP_PW_MISC_IO)) val |= I915_READ(regs->bios); @@ -3058,7 +3058,7 @@ static uint32_t get_allowed_dc_mask(const struct drm_i915_private *dev_priv, * suspend/resume, so allow it unconditionally. */ mask = DC_STATE_EN_DC9; - } else if (IS_GEN10(dev_priv) || IS_GEN9_BC(dev_priv)) { + } else if (IS_GEN(dev_priv, 10) || IS_GEN9_BC(dev_priv)) { max_dc = 2; mask = 0; } else if (IS_GEN9_LP(dev_priv)) { |