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author | Alex Deucher <alexander.deucher@amd.com> | 2013-10-01 16:40:45 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2013-10-09 17:13:46 -0400 |
commit | aa3e146d04b6ae37939daeebaec060562b3db559 (patch) | |
tree | 99dde364b1cab9c836a88674dfbc140024253e68 /drivers/gpu/drm/radeon/r600d.h | |
parent | dca5086a90c9ec64f4e0de801a659508202b0640 (diff) |
drm/radeon: fix typo in CP DMA register headers
Wrong bit offset for SRC endian swapping.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers/gpu/drm/radeon/r600d.h')
-rw-r--r-- | drivers/gpu/drm/radeon/r600d.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h index e673fe26ea84..7b3c7b5932c5 100644 --- a/drivers/gpu/drm/radeon/r600d.h +++ b/drivers/gpu/drm/radeon/r600d.h @@ -1523,7 +1523,7 @@ */ # define PACKET3_CP_DMA_CP_SYNC (1 << 31) /* COMMAND */ -# define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 23) +# define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 22) /* 0 - none * 1 - 8 in 16 * 2 - 8 in 32 |