diff options
author | Doug Anderson <dianders@chromium.org> | 2015-05-12 14:46:11 -0700 |
---|---|---|
committer | Ulf Hansson <ulf.hansson@linaro.org> | 2015-06-01 09:07:07 +0200 |
commit | 7c5209c315ea0f3102413ed1d6309be94b1e792f (patch) | |
tree | d94fe98a80010cbb17a8b1be4dd1632cd0227e97 /drivers/mmc/core/core.c | |
parent | e6ac184bddf89be37644c066b3fc819b91f54d94 (diff) |
mmc: core: Increase delay for voltage to stabilize from 3.3V to 1.8V
Since the regulator used for the SDMMC IO voltage is not expected to
draw a lot of current, most systems will probably use an inexpensive
LDO for it. LDO regulators apparently have the feature that they
don't actively drive the voltage down--they wait for other components
in the system to drag the voltage down. Thus they will transition
faster under heavy loads and slower under light loads.
During an SDMMC voltage change from 3.3V to 1.8V, we are almost
certainly under a light load. To be specific:
* The regulator is hooked through pulls to CMD0-3 and DAT. Probably
the CMD pulls are something like 47K and the DAT is something like
10K.
* The card is supposed to be driving DAT0-3 low during voltage change
which will draw _some_ current, but not a lot.
* The regulator is also provided to the SDMMC host controller, but the
SDMMC host controller is in open drain mode during the voltage
change and so shouldn't be drawing much current.
In order to keep the SDMMC host working properly (or for noise
reasons), there might also be a capacitor attached to the SDMMC IO
regulator. This also will have the effect of slowing down transitions
of the regulator, especially under light loads.
From experimental evidence, we've seen the voltage change fail if the
card doesn't detect that the voltage fell to less than about 2.3V when
we turn on the clock. On one device (that admittedly had a 47K CMD
pullup instead of a 10K CMD pullup) we saw that the voltage was just
about 2.3V after 5ms and thus the voltage change would sometimes fail.
Doubling the delay gave margin and made the voltage change work 100%
of the time, despite the slightly weaker CMD pull.
At the moment submitting this as an RFC patch since my problem _could_
be fixed by increasing the pull strength (or using a smaller
capacitor). However being a little bit more lenient to strange
hardware could also be a good thing.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc/core/core.c')
-rw-r--r-- | drivers/mmc/core/core.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c index 8c61ddd7748c..a262a0bf2f86 100644 --- a/drivers/mmc/core/core.c +++ b/drivers/mmc/core/core.c @@ -1588,8 +1588,8 @@ int mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage, u32 ocr) goto power_cycle; } - /* Keep clock gated for at least 5 ms */ - mmc_delay(5); + /* Keep clock gated for at least 10 ms, though spec only says 5 ms */ + mmc_delay(10); host->ios.clock = clock; mmc_set_ios(host); |