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| author | Palmer Dabbelt <palmer@rivosinc.com> | 2022-08-18 13:40:51 -0700 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2022-08-18 13:41:00 -0700 |
| commit | 789f3fa9dca071c95350583c34a70afec8afc51d (patch) | |
| tree | eadce30e55aff942aca6c4b73b48076712d694e9 /drivers/perf | |
| parent | 568035b01cfb107af8d2e4bd2fb9aea22cf5b868 (diff) | |
| parent | fbd92809997a391f28075f1c8b5ee314c225557c (diff) | |
Merge tag 'riscv-topo-on-6.0-rc1' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ into for-next
Fix RISC-V's topology reporting
The goal here is the fix the incorrectly reported arch topology on
RISC-V which seems to have been broken since it was added.
cpu, package and thread IDs are all currently reported as -1, so tools
like lstopo think systems have multiple threads on the same core when
this is not true:
https://github.com/open-mpi/hwloc/issues/536
arm64's topology code basically applies to RISC-V too, so it has been
made generic along with the removal of MPIDR related code, which
appears to be redudant code since '3102bc0e6ac7 ("arm64: topology: Stop
using MPIDR for topology information")' replaced the code that actually
interacted with MPIDR with default values.
* tag 'riscv-topo-on-6.0-rc1' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/:
riscv: topology: fix default topology reporting
arm64: topology: move store_cpu_topology() to shared code
Diffstat (limited to 'drivers/perf')
0 files changed, 0 insertions, 0 deletions