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authorAlexandre Bounine <alexandre.bounine@idt.com>2011-12-08 14:34:42 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2011-12-09 07:50:29 -0800
commit1cee22b7f385b6c4f716846203a96e1f302132aa (patch)
tree44ac23d3a52c80c6b1e462b7b9502a0fe61a17e4 /drivers/rapidio/devices/tsi721.h
parentb439e66f04bff6476c5d4bae6a52ab93fbb9a8f4 (diff)
rapidio/tsi721: modify PCIe capability settings
Modify initialization of PCIe capability registers in Tsi721 mport driver: - change Completion Timeout value to avoid unexpected data transfer aborts during intensive traffic. - replace hardcoded offset of PCIe capability block by making it use the common function. This patch is applicable to kernel versions starting from 3.2-rc1. Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com> Cc: Matt Porter <mporter@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/rapidio/devices/tsi721.h')
-rw-r--r--drivers/rapidio/devices/tsi721.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/rapidio/devices/tsi721.h b/drivers/rapidio/devices/tsi721.h
index 58be4deb1402..822e54c394d5 100644
--- a/drivers/rapidio/devices/tsi721.h
+++ b/drivers/rapidio/devices/tsi721.h
@@ -72,6 +72,8 @@
#define TSI721_MSIXPBA_OFFSET 0x2a000
#define TSI721_PCIECFG_EPCTL 0x400
+#define MAX_READ_REQUEST_SZ_SHIFT 12
+
/*
* Event Management Registers
*/