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author | Thierry Reding <treding@nvidia.com> | 2015-06-02 13:13:01 +0200 |
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committer | Thierry Reding <treding@nvidia.com> | 2015-06-12 16:26:04 +0200 |
commit | 8a8005e3e19915559b542bf85cc1b17024ee1d31 (patch) | |
tree | 4bb8b985a8c62ad80e531d8aa393a368546510ff /include | |
parent | fd73caa5e72f0fcf9732b18d123eead96286fd5b (diff) |
drm/tegra: dpaux: Registers are 32-bit
Use a sized unsigned 32-bit data type (u32) to store register contents.
The DPAUX registers are 32 bits wide irrespective of the architecture's
data width.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions