diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2018-02-16 15:47:26 +0100 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2018-02-16 15:47:26 +0100 |
commit | 6dee6ae9d62642e81def4d461d71f13a6496ab59 (patch) | |
tree | 6c75d416c427a59f190e197ad83fe59b7bebf656 /kernel/async.c | |
parent | 1beaeacdc88b537703d04d5536235d0bbb36db93 (diff) | |
parent | 0b24a0bbe2147815d982d9335c41bb10c04f40bc (diff) |
Merge tag 'irqchip-4.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent
Pull irqchip updates for 4.16-rc2 from Marc Zyngier
- A MIPS GIC fix for spurious, masked interrupts
- A fix for a subtle IPI bug in GICv3
- Do not probe GICv3 ITSs that are marked as disabled
- Multi-MSI support for GICv2m
- Various cleanups
Diffstat (limited to 'kernel/async.c')
-rw-r--r-- | kernel/async.c | 20 |
1 files changed, 12 insertions, 8 deletions
diff --git a/kernel/async.c b/kernel/async.c index 2cbd3dd5940d..a893d6170944 100644 --- a/kernel/async.c +++ b/kernel/async.c @@ -84,20 +84,24 @@ static atomic_t entry_count; static async_cookie_t lowest_in_progress(struct async_domain *domain) { - struct list_head *pending; + struct async_entry *first = NULL; async_cookie_t ret = ASYNC_COOKIE_MAX; unsigned long flags; spin_lock_irqsave(&async_lock, flags); - if (domain) - pending = &domain->pending; - else - pending = &async_global_pending; + if (domain) { + if (!list_empty(&domain->pending)) + first = list_first_entry(&domain->pending, + struct async_entry, domain_list); + } else { + if (!list_empty(&async_global_pending)) + first = list_first_entry(&async_global_pending, + struct async_entry, global_list); + } - if (!list_empty(pending)) - ret = list_first_entry(pending, struct async_entry, - domain_list)->cookie; + if (first) + ret = first->cookie; spin_unlock_irqrestore(&async_lock, flags); return ret; |