Merge tag 'clk-imx-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-imx

Pull i.MX clk driver updates from Shawn Guo:

 - A series from Anson to convert i.MX8 clock bindings to json-schema
 - Update pll14xx driver to include new frequency entries for pll1443x
   table, and return error for invalid PLL type
 - Clean up header includes and unnecessary code on a few clock driver
 - Add mssing of_node_put() call for a number of clock drivers
 - Drop flag CLK_IS_CRITICAL from 'A53_CORE' mux clock, as we already
   have the flag on its child cpu clock
 - Fix a53 cpu clock for i.MX8 drivers to get it source from ARM PLL
   via CORE_SEL slice, and source from A53 CCM clk root when we need to
   change ARM PLL frequency. Thus, we can support core running above
   1GHz safely
 - Update pfdv2 driver to check zero rate and use determine_rate for
   getting the best rate
 - Add CLKO2 for imx8mm, SNVS clock for imx8mn, and PXP clock for imx7d

* tag 'clk-imx-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (41 commits)
  clk: imx: clk-gate2: Pass the device to the register function
  clk: imx7d: Add PXP clock
  clk: imx8mq: A53 core clock no need to be critical
  clk: imx8mp: A53 core clock no need to be critical
  clk: imx8mm: A53 core clock no need to be critical
  clk: imx8mn: A53 core clock no need to be critical
  clk: imx: pllv4: use prepare/unprepare
  clk: imx: pfdv2: determine best parent rate
  clk: imx: pfdv2: switch to use determine_rate
  clk: imx: Fix division by zero warning on pfdv2
  clk: imx: clk-sscg-pll: Drop unnecessary initialization
  clk: imx: pll14xx: Return error if pll type is invalid
  clk: imx: imx8mp: fix a53 cpu clock
  clk: imx: imx8mn: fix a53 cpu clock
  clk: imx: imx8mm: fix a53 cpu clock
  clk: imx: imx8mq: fix a53 cpu clock
  clk: imx8mp: Rename the IMX8MP_CLK_HDMI_27M clock
  clk: imx8mn: Remove unused includes
  clk: imx8mm: Remove unused includes
  clk: imx8mp: Include slab.h instead of clkdev.h
  ...

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