diff options
| author | Claudiu Beznea <claudiu.beznea@microchip.com> | 2021-09-30 18:42:17 +0300 |
|---|---|---|
| committer | Nicolas Ferre <nicolas.ferre@microchip.com> | 2021-10-04 11:54:20 +0200 |
| commit | ef162ac50d5512e51da53b4c971597aabac7ea1f (patch) | |
| tree | f8b002cd1f3dee244915c90a62246f32bae24b54 /lib/fdt.c | |
| parent | 4348cc10da6377a86940beb20ad357933b8f91bb (diff) | |
ARM: dts: at91: sama7g5ek: add suspend voltage for ddr3l rail
SAMA7G5-EK board has DDR3L type of memory soldered. This needs 1.35V. The
1.35V for DDR3L rail at run-time is selected by the proper configuration
on SELV2 pin (for 1.35V it needs to be in high-z state). When suspended
the MCP16502 PMIC soldered on SAMA7G5-EK will use different sets of
configuration registers to provide proper voltages on its rail. Run-time
configuration registers could be configured differently than suspend
configuration register for MCP16502 (VSEL2 affects only run-time
configuration). In suspend states the DDR3L memory soldered on SAMA7G5-EK
switches to self-refresh. Even on self-refresh it needs to be powered by
a 1.35V rail. Thus, make sure the PMIC is configured properly when system
is suspended.
Fixes: 7540629e2fc7 (ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210930154219.2214051-2-claudiu.beznea@microchip.com
Diffstat (limited to 'lib/fdt.c')
0 files changed, 0 insertions, 0 deletions