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authorKishon Vijay Abraham I <kishon@ti.com>2021-03-19 18:11:26 +0530
committerVinod Koul <vkoul@kernel.org>2021-03-31 16:43:21 +0530
commitdb7a346405dc71be0c4ad7f39dd7978d4d20dee0 (patch)
tree0df6b2e5023d7b2f5461304662fcb704af3016d6 /scripts/gdb/linux/config.py
parent29c2d02adbc817e91f078ace1c625c34928bf73a (diff)
dt-bindings: phy: phy-cadence-sierra: Add binding to model Sierra as clock provider
Add #clock-cells binding to model Sierra as clock provider and include clock IDs for PLL_CMNLC and PLL_CMNLC1. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210319124128.13308-12-kishon@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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