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author | Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | 2015-07-15 07:12:18 +0000 |
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committer | Mark Brown <broonie@kernel.org> | 2015-07-16 22:29:20 +0100 |
commit | 379febfd2e30ec8db5baccd9f9403bf650c6afa1 (patch) | |
tree | 334abaff24634b45debdfb970337ef63d1884963 /scripts/gdb/linux/cpus.py | |
parent | 636e4bad5cca947839c09d3e13ad6feeb7fa45da (diff) |
ASoC: rsnd: src: make sure SRC soft reset
Renesas SCU (Sampling Rate Convert Unit) includes SRC/CTU/MIX/DVC,
and these have similar register. xxxRSR (Software reset Register) is one
of them. These xxxRSR need be set to 1 to 0 when software reset.
Current rsnd driver has src.c / dvc.c, and we will have mix.c.
It is readable if these have same named function.
This patch adds rsnd_src_soft_reset() and make sure it
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Keita Kobayashi <keita.kobayashi.ym@renesas.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'scripts/gdb/linux/cpus.py')
0 files changed, 0 insertions, 0 deletions