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| author | Stephen Boyd <sboyd@kernel.org> | 2018-12-07 12:34:11 -0800 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2018-12-07 12:34:11 -0800 |
| commit | 60baf75e3f5b76043c25328ac0c5320aaef5ea41 (patch) | |
| tree | c87ec33dffd97f1af7cbe9db20a777a74c83693d /scripts/gdb/linux/cpus.py | |
| parent | 1ef06003a50caae05f866f44e6abf93fae7dfa5b (diff) | |
| parent | 36c4da4f552a126bb29a95dc5c9608795491e32a (diff) | |
Merge tag 'clk-renesas-for-v4.21-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas
Pull Renesas clk driver updates from Geert Uytterhoeven:
- Add support for CPEX (timer) clocks on various R-Car Gen3 and RZ/G2 SoCs
- Add support for SDHI HS400 clocks on early revisions of R-Car H3 and M3-W
- Miscellaneous fixes based on the Hardware Manual Errata
* tag 'clk-renesas-for-v4.21-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: rcar-gen3: Add HS400 quirk for SD clock
clk: renesas: rcar-gen3: Add documentation for SD clocks
clk: renesas: rcar-gen3: Set state when registering SD clocks
clk: renesas: r8a77995: Simplify PLL3 multiplier/divider
clk: renesas: r8a77995: Add missing CPEX clock
clk: renesas: r8a77995: Remove non-existent SSP clocks
clk: renesas: r8a77995: Remove non-existent VIN5-7 module clocks
clk: renesas: r8a77995: Correct parent clock of DU
clk: renesas: r8a77990: Correct parent clock of DU
clk: renesas: r8a77970: Add CPEX clock
clk: renesas: r8a77965: Add CPEX clock
clk: renesas: r8a7796: Add CPEX clock
clk: renesas: r8a7795: Add CPEX clock
clk: renesas: r8a774a1: Add CPEX clock
dt-bindings: clock: r8a7796: Remove CSIREF clock
dt-bindings: clock: r8a7795: Remove CSIREF clock
Diffstat (limited to 'scripts/gdb/linux/cpus.py')
0 files changed, 0 insertions, 0 deletions