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| author | Marc Zyngier <maz@kernel.org> | 2019-05-22 18:16:49 +0100 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2019-08-18 18:38:49 +0100 |
| commit | 363518f37a86acc515defae6d1ba91a6c7617de9 (patch) | |
| tree | 6f1672303b5dac0f33a01eb764e94e0c2b2eef67 /scripts/gdb/linux/utils.py | |
| parent | b4931afcde1ffccd4a406009aef33c14bc6c6cb8 (diff) | |
KVM: arm/arm64: vgic-its: Invalidate MSI-LPI translation cache on ITS disable
If an ITS gets disabled, we need to make sure that further interrupts
won't hit in the cache. For that, we invalidate the translation cache
when the ITS is disabled.
Tested-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions