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| author | Fabio Estevam <fabio.estevam@freescale.com> | 2015-03-09 23:33:22 -0300 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@linaro.org> | 2015-03-30 16:43:34 +0800 |
| commit | 649b1fe856ad577a5db1b613c9fb0167a10abd8c (patch) | |
| tree | 59fd636300a19b0e211c67bde73f6dd2141a8eeb /scripts/gdb/linux/utils.py | |
| parent | e2675266b39b979d1d60b3671d5053af4a719be0 (diff) | |
ARM: dts: imx6sl-warp: Pass 'bus-width' property
USDHC2 port uses all the 8 data signals, so pass the 'bus-width' property
accordingly.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions