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| author | Manikanta Maddireddy <mmaddireddy@nvidia.com> | 2019-06-18 23:31:56 +0530 |
|---|---|---|
| committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2019-06-20 17:23:05 +0100 |
| commit | eef4a35026613ff1576ca93a9b158e774330576b (patch) | |
| tree | e875ccc88271501a965379fb5cd96bcae7655281 /scripts/gdb/linux/utils.py | |
| parent | c23ae2aec5bc40cfc8e9ad0058aff2edacb0fbcb (diff) | |
PCI: tegra: Fix PLLE power down issue due to CLKREQ# signal
Disable controllers which failed to bring the link up and configure
CLKREQ# signals of these controllers as GPIO. This is required to avoid
CLKREQ# signal of inactive controllers interfering with PLLE power down
sequence.
PCIE_CLKREQ_GPIO bits are defined only in Tegra186, however programming
these bits in other SoCs doesn't cause any side effects. Program these
bits for all Tegra SoCs to avoid a conditional check.
Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions