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| author | A.s. Dong <aisheng.dong@nxp.com> | 2018-11-14 13:01:39 +0000 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2018-12-03 11:31:24 -0800 |
| commit | e983da27f70e8d29f4ae7262d52e4d07129498f3 (patch) | |
| tree | 595b5d52cc4c85ac86e31c70d47a4f64b51c5944 /scripts/gen_compile_commands.py | |
| parent | 404680794224334bcbea498d571c645e1838c879 (diff) | |
clk: fractional-divider: add CLK_FRAC_DIVIDER_ZERO_BASED flag support
Adding CLK_FRAC_DIVIDER_ZERO_BASED flag to indicate the numerator and
denominator value in register are start from 0.
This can be used to support frac dividers like below:
Divider output clock = Divider input clock x [(frac +1) / (div +1)]
where frac/div in register is:
000b - Divide by 1.
001b - Divide by 2.
010b - Divide by 3.
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'scripts/gen_compile_commands.py')
0 files changed, 0 insertions, 0 deletions