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authorOlof Johansson <olof@lixom.net>2013-01-22 11:20:18 -0800
committerOlof Johansson <olof@lixom.net>2013-01-22 11:20:29 -0800
commit51edce0ccee090ea762a3014510e7870d25c49df (patch)
treeb960c6e50a318cb3a737f31323fe50246a87a0f3 /sound/arm
parentb2555b877bf9faf7045ae362ca051590e79167cf (diff)
parent7662a9c60fee25d7234da4be6d8eab2b2ac88448 (diff)
Merge tag 'omap-for-v3.8-rc4/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
From Tony Lindgren: Minimal omap fixes for the -rc series: - A build fix for recently merged omap DRM changes - Regression fixes from the common clock framework conversion for omap4 audio and omap2 reboot - Regression fix for pandaboard WLAN control UART muxing caused by u-boot only muxing essential pins nowadays - Timer iteration fix for CONFIG_OF_DYNAMIC - A section mismatch fix for ocp2scp init * tag 'omap-for-v3.8-rc4/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (306 commits) ARM: OMAP2+: omap4-panda: add UART2 muxing for WiLink shared transport ARM: OMAP2+: DT node Timer iteration fix ARM: OMAP2+: Fix section warning for omap_init_ocp2scp() ARM: OMAP2+: fix build break for omapdrm ARM: OMAP2: Fix missing omap2xxx_clkt_vps_late_init function calls ARM: OMAP4: hwmod_data: Correct IDLEMODE for McPDM ARM: OMAP4: clock data: Lock ABE DPLL on all revisions + Linux 3.8-rc4 Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'sound/arm')
-rw-r--r--sound/arm/pxa2xx-ac97-lib.c26
1 files changed, 23 insertions, 3 deletions
diff --git a/sound/arm/pxa2xx-ac97-lib.c b/sound/arm/pxa2xx-ac97-lib.c
index 6fc0ae90e5b1..fff7753e35c1 100644
--- a/sound/arm/pxa2xx-ac97-lib.c
+++ b/sound/arm/pxa2xx-ac97-lib.c
@@ -18,6 +18,7 @@
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/io.h>
+#include <linux/gpio.h>
#include <sound/ac97_codec.h>
#include <sound/pxa2xx-lib.h>
@@ -148,6 +149,8 @@ static inline void pxa_ac97_warm_pxa27x(void)
static inline void pxa_ac97_cold_pxa27x(void)
{
+ unsigned int timeout;
+
GCR &= GCR_COLD_RST; /* clear everything but nCRST */
GCR &= ~GCR_COLD_RST; /* then assert nCRST */
@@ -157,8 +160,10 @@ static inline void pxa_ac97_cold_pxa27x(void)
clk_enable(ac97conf_clk);
udelay(5);
clk_disable(ac97conf_clk);
- GCR = GCR_COLD_RST;
- udelay(50);
+ GCR = GCR_COLD_RST | GCR_WARM_RST;
+ timeout = 100; /* wait for the codec-ready bit to be set */
+ while (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR)) && timeout--)
+ mdelay(1);
}
#endif
@@ -340,8 +345,21 @@ int pxa2xx_ac97_hw_probe(struct platform_device *dev)
}
if (cpu_is_pxa27x()) {
- /* Use GPIO 113 as AC97 Reset on Bulverde */
+ /*
+ * This gpio is needed for a work-around to a bug in the ac97
+ * controller during warm reset. The direction and level is set
+ * here so that it is an output driven high when switching from
+ * AC97_nRESET alt function to generic gpio.
+ */
+ ret = gpio_request_one(reset_gpio, GPIOF_OUT_INIT_HIGH,
+ "pxa27x ac97 reset");
+ if (ret < 0) {
+ pr_err("%s: gpio_request_one() failed: %d\n",
+ __func__, ret);
+ goto err_conf;
+ }
pxa27x_assert_ac97reset(reset_gpio, 0);
+
ac97conf_clk = clk_get(&dev->dev, "AC97CONFCLK");
if (IS_ERR(ac97conf_clk)) {
ret = PTR_ERR(ac97conf_clk);
@@ -384,6 +402,8 @@ EXPORT_SYMBOL_GPL(pxa2xx_ac97_hw_probe);
void pxa2xx_ac97_hw_remove(struct platform_device *dev)
{
+ if (cpu_is_pxa27x())
+ gpio_free(reset_gpio);
GCR |= GCR_ACLINK_OFF;
free_irq(IRQ_AC97, NULL);
if (ac97conf_clk) {