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authorMarc Zyngier <marc.zyngier@arm.com>2016-02-09 18:53:04 +0000
committerMarc Zyngier <marc.zyngier@arm.com>2016-03-09 04:24:06 +0000
commitb4344545cf85d2a6ad546ec21dab5f76487e020e (patch)
treeb495bbd8a0579cfa38c3d7fca848c6e4f7e23cac /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/Util.py
parent1b8e83c04ee2c05c0cd0d304c4b389adf24ebe7f (diff)
arm64: KVM: vgic-v3: Save maintenance interrupt state only if required
Next on our list of useless accesses is the maintenance interrupt status registers (ICH_MISR_EL2, ICH_EISR_EL2). It is pointless to save them if we haven't asked for a maintenance interrupt the first place, which can only happen for two reasons: - Underflow: ICH_HCR_UIE will be set, - EOI: ICH_LR_EOI will be set. These conditions can be checked on the in-memory copies of the regs. Should any of these two condition be valid, we must read GICH_MISR. We can then check for ICH_MISR_EOI, and only when set read ICH_EISR_EL2. This means that in most case, we don't have to save them at all. Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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