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| author | Kathiravan T <quic_kathirav@quicinc.com> | 2022-02-08 21:05:24 +0530 |
|---|---|---|
| committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2022-02-10 18:12:04 -0600 |
| commit | 59892de947f0ca1d65426f7a6c6e258863fa65d7 (patch) | |
| tree | 76a9dff7eda901227bd7ef7ee8119254f513a085 /tools/perf/scripts/python/check-perf-trace.py | |
| parent | ff899133fdae9c4d63a59e544c821b1ee438dbd6 (diff) | |
arm64: dts: qcom: ipq8074: enable the GICv2m support
GIC used in the IPQ8074 SoCs has one instance of the GICv2m extension,
which supports upto 32 MSI interrupts. Lets add support for the same.
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1644334525-11577-2-git-send-email-quic_kathirav@quicinc.com
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions