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authorJosé Roberto de Souza <jose.souza@intel.com>2021-02-09 10:14:37 -0800
committerJosé Roberto de Souza <jose.souza@intel.com>2021-02-22 06:28:03 -0800
commit774ab4ff15c020f5b38b45958ee22193d06a17d7 (patch)
tree53e90dd3c475f0e301bf8b9cc2282aa6c6f11da3 /tools/perf/scripts/python/check-perf-trace.py
parenta22af61d438e0de3196af21d0387499d999a1698 (diff)
drm/i915/display: Only write to register in intel_psr2_program_trans_man_trk_ctl()
There is no support for two pipes one transcoder for PSR and if we had that the current code should not use cpu_transcoder. Also I can't see a scenario where crtc_state->enable_psr2_sel_fetch is set and PSR is not enabled and if by a bug it happens PSR HW will just ignore any value in set in PSR2_MAN_TRK_CTL. So dropping all the rest and keeping the same behavior that we have with intel_psr2_program_plane_sel_fetch(). Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210209181439.215104-2-jose.souza@intel.com
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