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| author | Will Deacon <will.deacon@arm.com> | 2015-08-20 12:12:32 +0100 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2015-09-22 17:36:04 +0100 |
| commit | f0c453dbcce7767cd868deb809ba68083c93954e (patch) | |
| tree | f129889801deafa68ad7ae6caa2ed454bdba3b48 /tools/perf/scripts/python/event_analyzing_sample.py | |
| parent | ffcb6d1686ceb4a6b50776fb2597ab0e4dd79040 (diff) | |
iommu/arm-smmu: Ensure IAS is set correctly for AArch32-capable SMMUs
AArch32-capable SMMU implementations have a minimum IAS of 40 bits, so
ensure that is reflected in the stage-2 page table configuration.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'tools/perf/scripts/python/event_analyzing_sample.py')
0 files changed, 0 insertions, 0 deletions