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authorGeert Uytterhoeven <geert+renesas@glider.be>2017-04-03 11:45:42 +0200
committerSimon Horman <horms+renesas@verge.net.au>2017-04-03 06:32:43 -0400
commit16fe68dcab5702a024d85229ff7e98979cb701a5 (patch)
tree05e960f8447374c70f9d7d14827a5c6092cf8ad7 /tools/perf/scripts/python/export-to-postgresql.py
parentd13d4e063d4a08eb1686e890e9183dde709871bf (diff)
ARM: dts: r8a7791: Correct parent of SSI[0-9] clocks
The SSI-ALL gate clock is located in between the P clock and the individual SSI[0-9] clocks, hence the former should be listed as their parent. Fixes: ee9141522dcf13f8 ("ARM: shmobile: r8a7791: add MSTP10 support on DTSI") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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