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authorPali Rohár <pali@kernel.org>2022-01-10 02:50:12 +0100
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>2022-02-08 10:44:27 +0000
commit273ddd86d67694e3639e3bfe337a96d8861798b8 (patch)
tree6f35e4f836b820170bcb2a889a0672e45d1c0804 /tools/perf/scripts/python/export-to-postgresql.py
parent0fc75d87454195885bd1a81fc7e6ce92572b6109 (diff)
PCI: aardvark: Fix support for PME requester on emulated bridge
Enable aardvark PME interrupt unconditionally by unmasking it and read PME requester ID to emulated bridge config space immediately after receiving interrupt. PME requester ID is stored in the PCIE_MSG_LOG_REG register, which contains the last inbound message. So when new inbound message is received by HW (including non-PM), the content in PCIE_MSG_LOG_REG register is replaced by a new value. PCIe specification mandates that subsequent PMEs are kept pending until the PME Status Register bit is cleared by software by writing a 1b. Support for masking/unmasking PME interrupt on emulated bridge via PCI_EXP_RTCTL_PMEIE bit is now implemented only in emulated bridge config space, to ensure that we do not miss any aardvark PME interrupt. Reading of PCI_EXP_RTCAP and PCI_EXP_RTSTA registers is simplified as final value is now always stored into emulated bridge config space by the interrupt handler, so there is no need to implement support for these registers in read_pcie callback. Clearing of W1C bit PCI_EXP_RTSTA_PME is now also simplified as it is done by pci-bridge-emul.c code for emulated bridge config space. So there is no need to implement support for clearing this bit in write_pcie callback. Link: https://lore.kernel.org/r/20220110015018.26359-18-kabel@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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